PLEASE USE ARM, NOT MIPS.

2. Hazard Consider the following sequence of instructions LDR R1, LDR R2, ADD R3, [R2, #0] [R3, #0] R1, R2 For each of the question below, assume the stalls have to be handled by the compiler by inserting NOP instructions (a) Assume there is no forwarding in this pipelined processor. Write the code with the proper NOP instructions added (b) Assume there is forwarding. Write the code with proper NOP instructions added (c) Assume there is only EX-EX forwarding only. Write the code wiith proper NOP nstructions added