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please write code of this program in java language , without do the part with have line and color is red Address file 16916 62493
please write code of this program in java language, without do the part with have line and color is red
Address file
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1. Designing and simulating a contiguous region of memory Design and implement a program that simulates some of managing a contiguous region of memory of size MAX where addresses may range from 0...MAX1. Your program must respond to four different requests: a. Request for a contiguous block of memory. b. Release of a contiguous block of memory. c. Compact unused holes of memory into one single block. d. Report the regions of free and allocated memory. 2. Allocating Memory Your program will allocate memory using one of the three approaches: first fit, best fit, and worst fit depending on the flag that is passed to the RQ command. The flags are: - F-first fit - B-best fit - W-worst fit This will require that your program keep track of the different holes representing available memory. When a request for memory arrives, it will allocate the memory from one of the available holes based on the allocation strategy. If there is insufficient memory to allocate to a request, it will output an error message and reject the request. Your program will also need to keep track of which region of memory has been allocated to which process. This is necessary to support the STAT command and is also needed when memory is released via the RL command, as the process releasing memory is passed to this command. If a partition being released is adjacent to an existing hole, be sure to combine the two holes into a single hole. 3. Compaction If the user enters the C command, your program will compact the set of holes into one larger hole. For example, if you have four separate holes of size 550KB,375KB,1,900KB, and 4,500 KB, your program will combine these four holes into one large hole of size 7,325KB. 4. Implementation hints (Pat I) Your program will be passed the initial amount of memory at startup. For example, the following initializes the program with 1MB(1,048,576 bytes) of memory: ./allocator 1048576 Once your program has started, it will present the user with the following prompt: allocator > It will then respond to the following commands: RQ (request), RL (release), C (compact), STAT (status report), and X (exit). A request for 40,000 bytes will appear as follows: allocator>RQP040000W The first parameter to the RQ command is the new process that requires the memory, followed by the amount of memory being requested, and finally the strategy. (In this situation, "W" refers to worst fit.) Similarly, a release will appear as: allocator > RL P0 This command will release the memory that has been allocated to process P0. The command for compaction is entered as: allocator >C This command will compact unused holes of memory into one region. Finally, the STAT command for reporting the status of memory is entered as: allocator > STAT Given this command, your program will report the regions of memory that are allocated and the regions that are unused. For example, one possible arrangement of memory allocation would be as follows: Addresses [0:315000] Process P1 Addresses [315001: 512500] Process P3 Addresses [512501:625575] Unused Addresses [625575:725100] Process P6 Addresses [725001] ... 5. Designing a Virtual Memory Manager This project consists of writing a program that translates logical to physical addresses for a virtual address space of size 216=65,536 bytes. Your program will read from a file containing logical addresses and, using a TLB and a page table, will translate each logical address to its corresponding physical address and output the value of the byte stored at the translated physical address. Your learning goal is to use simulation to understand the steps involved in translating logical to physical addresses. This will include resolving page faults using demand paging, managing a TLB, and implementing a page-replacement algorithm. 6. Specifications Your program will read a file containing several 32-bit integer numbers that represent logis addresses. However, you need only be concerned with 16-bit addresses, so you must mask t rightmost 16 bits of each logical address. These 16 bits are divided into (1) an 8-bit page number and (2) an 8-bit page offset. Hence, the addresses are structured as shown as: Other specifics include the following: - 28 entries in the page table - Page size of 28 bytes - Frame size of 28 bytes - 256 frames - Physical memory of 65,536 bytes ( 256 frames 256-byte frame size) Additionally, your program need only be concerned with reading logical addresses and translating them to their corresponding physical addresses. You do not need to support writing to the logical address space. 7. Address Translation Your program will translate logical to physical addresses tsing a TLB and page table as outlined in Section 9.3. First, the page number is extracted from the logical address, and the TLB is consulted. In the case of a TLB hit, the frame number is obtained from the TLB. In the case of a TLB miss, the page table must be consulted. In the latter ease, either the frame number is obtained from the page table, or a page fault occurs. A visual representation of the address-translation process is: 9. Test File Create the file addresses.txt, which contains integer values representing logical addresses ranging from 0 to 65535 (the size of the virtual address space). Your program will open this file, read each logical address and translate it to its corresponding physical address, and output the value of the signed byte at the physical address. 10.Implementation Hints (Part II) a. How to Begin Extracting page number and offset from the logical address: First, write a simple program that extracts the page number and offset based on: from the following integer numbers: 1,256,32768,32769,128,65534,33153 Perhaps the easiest way to do this is by using the operators for bit-masking and bit-shifting. Once you can correctly establish the page number and offset from an integer number, you are ready to begin. Initially, we suggest that you bypass the TLB and use only a page table. You ean integrate the TLB ence your page table is werking properly. Remember, address transtation ean work without a TLB; the TLB just makes it faster. When you are ready to implement the TLB, reeall that it has only sixteen entries, so you will need to use a replacement strategy when you update a full TLB. You may use either a FIFO or an LRU poliey for updating your TLB. Populating the physical memory and page table: Read 100 logical addresses from addresses.txt file one-by-one. For each logical address do the following: 1. Make sure that the page number is not in the Page Table (if it is in the page table use it and move on to step 3:computing the physical address) 2. Give a random number as a frame number (make sure it is with the range of frame numbers) 3. Compute the physical address, make sure it is not already allocated. If it is previously allocated find a new random number as a frame number, and so on PS. Since the logical addresses in the file are unique, then no need to make this check for page numbers that are already in the Page Table. 4. Add the new page number \& frame number to the page table, add the value of the corresponding signed byte to the new location in the physical memory created by you. b. How to Run Your Program Your program should run as follows: ./a.out addresses.txt Your program will read in the file addresses.txt, which contains 1,000 logical addresses ranging from 0 to 65535 . Your program is to translate each logical address to a physical address and determine the contents of the signed byte stored at the correct physical address. (Recall that in the C language, the char data type occupies a byte of storage, so we suggest using char values.) Requirement: make FIVE test cases, in each test case run the "address translation" command and provide the following output: a. The logical address being translated (the integer value being read from addresses.txt). b. The corresponding physical address (what your program translates the logical address to). c. The signed byte value stored in physical memory at the translated physical address. d. The signed byte value that corresponds to the logical address with the correct.txt file. e. Display a message stating that the test is successful when the two values generated in c and d matches, or there is an error other wise. We also provide the file correct.txt, which contains the correct output values for the file addresses.txt. You should use this file to determine if your program is correctly translating logical to physical addresses. PS. To avoid sequential accesses within the files, read first 30 values in an array or any other kind of data structure for fast access. Then run the test cases by RANDOMELY choosing an address from this list. 11. Statistics Run the following test case: - Choose a logical address string consisting of 50 logical addresses that are chosen from the list 100 logical addresses that were previously selected and 30 logical addresses that are different from these 100 addresses. The 80 logical addresses should not be divided into two separate groups within and without the original list, both types of addresses should be intermixed. - Run the page number extraction function developed previously on the 80 addresses: - If the page number is found in the page table output the corresponding unsigned byte value. - If not output page not in memory and increment the page fault counter. - At the end, output the length of the addresses string and the Page-fault rate-The percentage of address references that resulted in page faults. 12.Page Replacement (BONUS 3 points) Thus far, this project has assumed that physical memory is the same size as the virtual address space. In practice, physical memory is typically much smaller than a virtual address space. This phase of the project now assumes using a smaller physical address space with 128 page frames rather than 256 . This change will require modifying your program so that it keeps track of free page frames as well as implementing a page-replacement policy using either FIFO or LRU to resolve page faults when there is no free memory
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