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5. Modify the single-cycle MIPS processor to implement the instruction slti. See Appendix B (in the textbook) for a deinition of the instructions. Mark up a copy of Figure 7.11 (in the textbook) to indicate the changes to the datapath, Name any new control signals. Mark up a copy of the Table 1 below to show the changes to the main decoder. Describe any other changes that are required. ALUOP 10 1 0 0 0 0 Table 1 Main decoder truth table to mark up with changes Instruction Opcode RegWrite RegDst ALUSre Branch MemWrite MemtoReg R-type 000000 100011 101011 000100 1 0 1 0 0 1 00 SW 0 1 0 1 X 00 beg 0 X 0 1 0 X 01