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Problem 1 [10 points]. [Refer DDCA 6.2, 6.3.1] Identify the following ARM assembly instructions as data processing, memory, or branch instructions: a. ADDR2,R1,R b. BL

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Problem 1 [10 points]. [Refer DDCA 6.2, 6.3.1] Identify the following ARM assembly instructions as data processing, memory, or branch instructions: a. ADDR2,R1,R b. BL Target c. LDR R2, [R1, \#4] d. SUB R3, R1, R5 e. LSL R1, R2, \#2 f. BEQ Funct1 g. AND R3, R5, R7 h. STR R0, [R4] i. BLLT Prime j. EOR R6, R8, R10 Problem 2 [10 points]. [Refer DDCA 6.3.1] NOR and NAND instructions are not part of the ARM instructions set, because the same functionality can be implemented using existing instructions. Write short assembly code snippets that can achieve the following functionality: a. R0=R1 NOR R2 b. R0=R1 NAND R2 Problem 3 [10 points]. [Refer DDCA 6.2.2] Consider memory storage of a 32-bit word stored at the memory word 15 in a byte addressable memory. Note that each memory word is of size 4bytes ( 32 bits) and indexing for word or addressing starts at zero. a. What is the byte address of memory word 15 ? [2 points] b. What are the byte addresses, which memory word 15 spans? [3 points] c. Provide the address of each byte for the number 0x1F243645 stored at word 15 in both big endian and little endian machines. [5 points] Problem 4 [10 points]. [Refer DDCA 6.2.2 and 6.3.6] Explain how the following program can help to determine whether a computer is big endian or little endian: MOV R0, \#100 LDR R1, =\#0xAABBCCDD; which means R1 = 0xAABBCCDD STR R1, [R0] LDRB R2, [R]

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