Problem 2. Consider a UART with the following setup: 8 data bits Odd parity 1 stop bit LSB first BRCLK (Baudrate Source Clock) is 2.88 MHz Baudrate is 460800 bit/sec For the MSP432 UART, fill the below table (You can consult the table 24-4 of the MCU user guide shown below). a. Name BRCLrequencyBaudrate Division factor secondModReg Counter value modulation pattern for (in hex and binaryl sampling 8 bits Symbol UCBRS How to calculate? N f/B Table look upMix af IN), and W] +1 N-IND Your answer Problem 2. Consider a UART with the following setup: 8 data bits Odd parity 1 stop bit LSB first BRCLK (Baudrate Source Clock) is 2.88 MHz Baudrate is 460800 bit/sec For the MSP432 UART, fill the below table (You can consult the table 24-4 of the MCU user guide shown below). a. Name BRCLrequencyBaudrate Division factor secondModReg Counter value modulation pattern for (in hex and binaryl sampling 8 bits Symbol UCBRS How to calculate? N f/B Table look upMix af IN), and W] +1 N-IND Your