Problem 2: For each of the parts below write one or more statements of Verilog that implement the functionality shown in the schematic. Your Verilog code just has to produce the same values for its outputs it doesn't have to replicate the schematic logic gate-for-gate. Be sure to include the appropriate declarations for any wires or regs used in your code Part (a) 0] A11] 2] A(4) 45] 6] A7) Part b Part c: A logic function implemented as a multiplexer-based look up table AB 01 A,B)