problem3

b) Assume the cache is initialized empty, the CPU needs to access memory with the following 048, 2088, 0048, 010s, and 2008. For each memory access, decide whether it is a page hit or page fault, and whether it is a cache hit virtual address sequence: 0048, 0108, 200s, 2 or cache miss 3) [15] The memory architecture of a computer is summarized as Virtual Address: 54 bits; Page Size: 16 K-bytes; PTE (Page Table Entry) Size as 4 bytes. a) How large would a single-level page table be, given that each page requires 4 protection bits, and entries must be an integral number of bytes. b) Assume that there are 8 bits reserved for the operating system functions (protection, replacement, valid, modified, and Hit/Miss All overhead bits) other than required by the hardware translation algorithm. Derive the largest physical memory size (in bytes) allowed by this PTE format. Make sure you consider all the fields required by the translation algorithm Assuming one application exists in the system and the maximum physical memory is devoted to the process, how much physical space (in bytes) is there for the application's c) data and code? 4) [15] For this exercise, we assume that we have 512-byte cache with 64-byte blocks. We will also assume that the main memory is 2 KB large. We can regard the memory as an array of 64- byte blocks: MO, M1, .., M31.Table below, shows the memory blocks that can reside in different cache blocks if the cache was fully associative. Cache Block Set Way Memory blocks that can reside in the cache block