Q$1$: A carry look ahead generator circuit helps speed the process of adding binary numbers by calculating the carry bits before the addition process begins. Assuming a $6-$bit adder, and by using Verilog design and testing:

$1)$ Showhowfastisthecarrylookaheadcomparedtotheserialadder.Assumethatthe propagation delay of any logic gate used $($ AND, NAND, OR$,$ NOR, NOT, XOR, XNOR$)$ is $10$ns$.$

$2)$ Testthecircuitbyperforming$3$testsonaddingdifferentnumbersofyourchoice.