Q$1-$ Consider a dynamic RAM that must be given a refresh cycle $128$ times per ms$.$ Each refresh operation requires $200$ ns; a memory cycle requires $250$ns$.$ What percentage of the memory's total operating time must be given to refreshes?

Q$2-$ Consider a memory system that uses a $32-$bit address to address at the byte level, plus a cache that uses a $64-$byte line size. Assume a direct mapped cache with a tag field in the address of $20$ bits. Show the address format and determine the following parameters:

a$.$ Number of addressable units

b$.$ Number of blocks in main memory

c$.$ Number of lines in cache

d$.$ Size of tag

Q$3-$ A two$-$way set$-$associative cache consist of $128$ lines, or slot, divided into several sets. The main memory contains $8$K blocks of $256$ words each. Show the format of main memory addresses.

Q$4-$ What is the difference between multitasking and multiprogramming?

Q$5-$ Consider a $6-$drive, $150$ GB$-$per$-$drive RAID array. What is the available data storage capacity for each of the RAID levels $0,1,2,3,4,5$ and $6?$