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Q. A MIPS processor has a 64KB, 8-way set associative cache with 32-byte blocks. 1.How many total blocks in the cache? How many sets are

Q. A MIPS processor has a 64KB, 8-way set associative cache with 32-byte blocks.

1.How many total blocks in the cache? How many sets are there?

2.Assuming that memory is byte addressable and addresses are 32-bits long, calculate the number of bits requires for each of the following fields: tag, set index, and block offset.

3.The cache entry for each block may contain valid bit and dirty bit to indicate the status of the block. What are the purposes of these two bits?

4.caches can be accesses / indexed using virtual address, instead of using physical address. What is the advantage of using virtual address?

5.if we run a program which consists of 30% memory access instructions, what is the average CPI (cycle per instruction)? Assume that cache miss rate is 10%, miss penalty is 100 cycles and cache hit is one cycle?

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