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Q1 [10]: For the code sequence given below, fill out the status of reservation stations and register result status table at cycle 2 and cycle
Q1 [10]: For the code sequence given below, fill out the status of reservation stations and register result status table at cycle 2 and cycle 5. The functional units are described in the table below. There are three load buffer entries. The load instruction takes 2 cycles to complete. fld fadd.d fld fmul.d fsub.d f2, 0(x5) f8, f2, f10 f2, 16(x6) f12, f8, f4 f6, f8, f2 FU Type Cycles in EX Numbers of FU Number of reservation stations 2 4 1 FP Adder FP Multiplier 10 1 2 (Cycle 2) Instruction Status Execution Write Issue Instruction fld f2 Result j 0+ k x5 Complete fadd.d f8 f2 flo fld f2 16+ x6 f8 f4 f8 f2 fmul.d f12 fsub.d f6 Load Buffers Busy Load1 Load2 Load3 Addr. Reservation Stations Time Name Busy Si Vj S2 Vk RS for j Qj RS for k Qk Op Register Result Status Clock 2 f0f2 f4 f6f8 f10 f12 FU Q1 [10]: For the code sequence given below, fill out the status of reservation stations and register result status table at cycle 2 and cycle 5. The functional units are described in the table below. There are three load buffer entries. The load instruction takes 2 cycles to complete. fld fadd.d fld fmul.d fsub.d f2, 0(x5) f8, f2, f10 f2, 16(x6) f12, f8, f4 f6, f8, f2 FU Type Cycles in EX Numbers of FU Number of reservation stations 2 4 1 FP Adder FP Multiplier 10 1 2 (Cycle 2) Instruction Status Execution Write Issue Instruction fld f2 Result j 0+ k x5 Complete fadd.d f8 f2 flo fld f2 16+ x6 f8 f4 f8 f2 fmul.d f12 fsub.d f6 Load Buffers Busy Load1 Load2 Load3 Addr. Reservation Stations Time Name Busy Si Vj S2 Vk RS for j Qj RS for k Qk Op Register Result Status Clock 2 f0f2 f4 f6f8 f10 f12 FU
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