Q1. (80 points) Design a sequence detector circuit for the pattern 'abcdefg' with a given expression (69)10 = (abcdefg)2. Ensure the detection is synchronous, considering each active clock edge and allowing for overlapping sequences.

a) Derive a clear state diagram, indicating the meaning of each state. Specify whether the sequential circuit is Mealy or Moore.

b) Determine the necessary number of state variables and assign binary codes to states in the diagram.

c) Choose the type of Flip-Flops (FFs) for implementation, providing a complete state table using reverse characteristics tables of the corresponding FFs.

d) Obtain Boolean functions for state inputs and the output Boolean expression.

e) Draw the logic circuit for the sequence detector.

f) Verify your design with Logisim simulation, including the corresponding truth table.