Q1. Suppose we have a byte addressable memory of size 4GB (2^32 bytes). We are given a cache

of size of 256K MB L2 cache (2^17 bytes, not including tag bits) and a cache block size of 64

(2^6 ) bytes. The L2 cache is 8-way (2^3 ) associative. Compute for the L2 cache the length in number of bits for the tag, index and offset fields of a 32-bit memory address (show your calculations)

Q2. Considering the answer to part (a), circle the bits representing the index in the following 32bit memory address (in binary):

10011101110001101110100111000100

Q3. A computer system has a 1 GB main memory. It also has a 4K-Byte cache organized as a 4way set-associative, with 4 blocks per set and 64 bytes per block. Calculate the number of bits in the Tag, Set Index, and Byte Offset fields of the memory address format.