Q2. The figure below shows a 16-bit carry look-ahead adder (CLA) that consists of four 4-bit CLAs; the intemal design of the rightmost 4-bit CLA is provided as a reference. Answer the following questions: a. Given that a[15:0] =0100001100001110 and b[15:0]=1100010000000011. Write the equation and Compute the value of: - P2 ( with capital p)= - c8= b. How many gate delavs are needed to generate the following signals? Also specify all signals that are generated in parallel with each one. - G0: Delay = , Paralel Signals