Question 1 (4 points) What is the simplified Boolean expression for the output defined by the following truth table? (hint: Sum of Product then K-map) C Output 0 Output = ABC Output ABC+ ABC + ABC Output ABC Question 3 (4 points) What is the Boolean expression for the following output? NV NAND2 OR2 NAND2 0 AB+ AB A + B Question 4 (4 points) How many control inputs are needed for a 4x1 multiplexer? 8 12 4 16 Question 5 (4 points) What is the arithmetic equivalence for a shift left operation? Half the value Double the value Minus by two Add by two Question 7 (4 points) How many possible Boolean functions are there for three variable Boolean functions? (1) 128 8 256 16 Question 8 (4 points) Which of the following describes De Morgan's law? x+y =xy Page 8 of 25 Previous Page Next Page Question 9 (4 points) Which of the following is true about the circuit illustrated below? It is level triggered. The input D will be latched when the input C is low It is triggered by the falling edge of the clock. The output Q gets the input D on the rising edge of the clock. Question 10 (4 points) In J-K flip-flop, when both J and K are logic high, what would be the output Q? Pulse detector This input combination is restricted. Q will be set to logic low. Q will be set to logic high. Q will be flipped (toggled) Question 12 (4 points) What is the best description name of the following diagram? xor Co Ci Full adder S-Co Latch Multiplexer Halt adder Pat Question 13 (4 points) What happens if we provide logic high to the inputs S and R in the following circuit? so o0 The output of Q stays unchanged The output of Q is logic low The output of Q is logic high. The output of Q is restricted. Page 13 of 25 Question 15 (4 points) Which of the following gives the best description for the circuit below? Sw1 sw2 NOT gate NAND gate AND gate XOR gate Page 15 Question 16 (4 points) Which of the following is false? Half adders and full adders are combinational logic. Either half adder or full adder has two outputs. The number of inputs to a full adder is one more than that to a half adder The number of gates used in a fll adder is exactly twice as that in a half adder. Page 16 of Next Page Previous Page Question 17 (4 points) What is the Boolean expression for the output of the following circut? A e B A B A T B Page 17 of 25