Question 10: [10 marks] As discussed in the class for memory hierarchy to work correctly, the main memory is mapped on to the cache memory. Some of the mapping techniques are direct, fully associative and set associative. The key design parameters are: sizes of main and cache memory, lines (blocks) in the cache, blocks in the main memory and mapping function. For this question let us assume that the size of the main memory is 16Mbytes, the size of the cache is 16Kbytes and the size of the block is 32 bytes and the CPU is operating at 16MHz. a) ] How many address bits (lines) are needed for the main memory? b) [] How many blocks of main memory are there? How many bits are needed to identify these blocks? c) How many cache lines (slots, blocks) are there and how many bits are needed to identify these? d) ] How many tag bits are needed if the memory uses direct-mapped cache? e How many tag bits are needed if the memory uses fully-associative cache? How many tag bits are needed if the memory uses a two-way (set size of 2) set- associative cache