Question 13 (2 points) Assume that there is no pipeline stalls and that the breakdown of executed instructions are as follows add 30% addi 25% sit 5% bne 10% lw 15% sw 15% What percent of all cycles is the data memory used? What percent of the cycles is the signed- extended unit's output required? What percent of the cycles is the register fle written to ? Question 14 (3 points) IF 250ps