Question $2$

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FALSE $25327$ TRUE

Assume that you have a system that contains a $16-$word cache $(C=16).$ Consider the following RISC$-$V assembly code

addi t$0,$ zero, $4$

addi s$0,$zero,$0$

loop: beq t$0,$ zero, done

$Iwt1,0x30(s1)$

$Iwt2,074(s1)$

$Iwt3,054(s1)$

$Iwt3,050(s1)$

addi $0,t0,-1$

$j$ Ioop

done:

Part$2$: Two$-$way Set Associative Cache, $b=1$ word

Fill in the correct size for the cache fields $($Memory Address size is $32-$bit$)$:

$\backslash$table$[[$Tag$,$Set,Byte Offset$],[,,]]$

Place every instruction's data in the correct set in the cache. Also, determine what kind of miss the instruction faces.

$\backslash$table$[[\backslash$table$[[$Instruction$\text{'}$s$],[$data$]],\backslash$table$[[$Set Cache No$.],[$Answer as :$0,3,],[5...]],\backslash$table$[[$Compulsory miss$],[$Answer as: TRUE or$],[$FALSE$]],\backslash$table$[[$Conflict miss $(2$nd$],[$iteration$)],[$Answer as: TRUE or$],[$FALSE$]]],[mem[0x00.\mathrm{.}030],,,],[$mem$[0$x$00.\mathrm{.}074],,,],[$mem$[0$x$00.\mathrm{.}054],,,],[mem[000.\mathrm{.}050],,,]]$

Find the miss rate $($NOTE: if the number is $88\mathrm{.}777778,$ then your answer should be $88\mathrm{.}8)$ :

$($Note: number of misses includes both compulsory and the conflict misses in all iterations$)$

Cache miss rate$=$

$|\%$