Question 2 Suppose that (a) DS=1C8BH, CS=2345H, IP=0100H and BX=0106H, (b) the label ALPHA in the data segment has the value 0020H with the effective address 0010H, and (c) parts of memory locations (in Hexadecimal) are shown in the Fig.2 and the Fig.3. 1C8B:0100 03 C3 F7 E3 03 9D 89 56-67 66 03 04 5D 6A 5F 4E 1C8B:0110 AB 67 66 03 04 B5 4F 2E-BC AD 67 66 03 04 9D 6C 1C8B:0120 5B 4A 3E 67 66 03 1C B5-5C FB 3E 2D 03 C2 03 D9 Fig.2 2345:0100 66 03 C3 67 66 03 1C B5-4F 3C 1D 23 67 66 03 04 2345:0110 5D 6A 5E 4F 3D 67 66 03-04 BD 5B 4F 3E AB 67 66 2345:0120 03 1C B5 6F CB AD 58 67-66 03 04 5D 5E 4C 3D 12 Fig.3 For the instructions JMP WORD PTR[BX] and JMP DWORD PTR [BX+DATA] (The two instructions are executed separately) based on the Intel 8086 CPU, specify the addressing mode and the jump address (Both segment address and effective address) individually. Question 2 Suppose that (a) DS=1C8BH, CS=2345H, IP=0100H and BX=0106H, (b) the label ALPHA in the data segment has the value 0020H with the effective address 0010H, and (c) parts of memory locations (in Hexadecimal) are shown in the Fig.2 and the Fig.3. 1C8B:0100 03 C3 F7 E3 03 9D 89 56-67 66 03 04 5D 6A 5F 4E 1C8B:0110 AB 67 66 03 04 B5 4F 2E-BC AD 67 66 03 04 9D 6C 1C8B:0120 5B 4A 3E 67 66 03 1C B5-5C FB 3E 2D 03 C2 03 D9 Fig.2 2345:0100 66 03 C3 67 66 03 1C B5-4F 3C 1D 23 67 66 03 04 2345:0110 5D 6A 5E 4F 3D 67 66 03-04 BD 5B 4F 3E AB 67 66 2345:0120 03 1C B5 6F CB AD 58 67-66 03 04 5D 5E 4C 3D 12 Fig.3 For the instructions JMP WORD PTR[BX] and JMP DWORD PTR [BX+DATA] (The two instructions are executed separately) based on the Intel 8086 CPU, specify the addressing mode and the jump address (Both segment address and effective address) individually