Question 2: You are on the design team for a new processor. The clock of the processor runs at 1000MHz. The following table gives instruction frequencies for Benchmark B, as well as how many cycles the instructions take, for the different classes of instructions. The CPU execution time on the benchmark is exactly 15 seconds. The hardware expert says that if you double the number of registers; the cycle time must be increased by 20%. Assume that the processor only executes one instruction at a time. a. Calculate the CPI for Benchmark B. When there are 100 instructions like: 60 of them will be loads and stores. 25 of them will be arithmetic instructions. 15 of them will be all others. (10 Marks) b. What is the "native MIPS" processor speed for the benchmark in MIPS(millions of instructions per second)? (10 Marks) c. What would be the new clock speed be (in MHz )? (10 Marks) d. The compiler expert says that if you double the number of registers, then the compiler will generate code that requires only half the number of Loads \& Stores. What would the new CPI be on the benchmark? (10 Marks) c. How many CPU seconds will the benchmark take, if we double the number of registers (considering both changes described above)? Hint: Calculate the Instruction count for 15 seconds and then find out how many Load and Store instructions are processed and then cut it down to half. Finally apply CPU time formula on the new IC, cpi and clock rate values. (10 Marks)