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Question 4: (2+10+4+4-20 points) Design a synchronous binary down counter using 4 negative edge-triggered JK flip-flops provided with a clock. The states (scquences) 010; 1000;

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Question 4: (2+10+4+4-20 points) Design a synchronous binary down counter using 4 negative edge-triggered JK flip-flops provided with a clock. The states (scquences) 010; 1000; and 1010 are considered as unused states (i) Draw the state diagram of the counter (ii) Build the counter's state table showing the synchronous inputs of the JK flip-flops as well (ii) Using Karnaugh maps, find the minimal sum-of products form of the equations for the inputs to the flip-flops; assume the next states of the unused combinations to be "don't care states" (iv) Draw the logic diagram of the counter

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