Question 5 (a) Figure 5(i) and Figure 5(ii) show the block diagram and the logic diagram of a 74293 integrated circuit chip respectively. Vec MR; MR, (14) (13)(12) CP: D(11) CP. D(10) (8) (4) (5) (9) (7) Q, Q. Q Q GND Figure 5(i) Qi Q Q Q 3 CP 4 K CLR K CLR K CLR K CLR CP All the J and K inputs are connected to logic 1. Q. is the most significant bit. MR1 MR2 Figure 5(ii) (i) Give four inferences about the logic diagram. (ii) In your opinion, why the manufacturer did not internally connect Qo to the clock input of flip-flop 2? (iii) Using the block diagram of the chip, show how a decade counter can be constructed. You may use external gates when necessary. (b) Figure 5(iii) s a block diagram of a ROM. O, A ROM B matrix So Address decoder 0;0,0,0,0, O, Figure 5(ii) Outputs of this ROM have the functions shown in Table 5. Table 5 Output Function O, O1, Op (O; MSB) 3-bit binary to Gray code converter 3-input exclusive-OR Em(3, 5, 6, 7) Os ), 1, 4, 6) (i) What is the size of this ROM? (ii) Draw the ROM matrix using the following legends. store a 0 store a 1 (iii) This ROM can also perform a 1-bit full-adder function. Explain how this can be achieved.