Recall Amdahl's Law, which calculates the overall speedup of a program when part of that program is sped up: speedup sped up and S is the speedup of that fraction f. overall s, where f is the fraction of the program to be Hill and Marty proposed the following hardware cost model. They assume that "a multicore chip of given size and technology generation can contain at most n base core equivalents (BCEs), where a single BCE implements the baseline core". The limit n might be a limit in size, power, cost, or a combination of those factors. They also assume that an architect can increase the performance of a core by giving it more resources. If a single core of size 1 BCE has performance Recall Amdahl's Law, which calculates the overall speedup of a program when part of that program is sped up: speedup sped up and S is the speedup of that fraction f. overall s, where f is the fraction of the program to be Hill and Marty proposed the following hardware cost model. They assume that "a multicore chip of given size and technology generation can contain at most n base core equivalents (BCEs), where a single BCE implements the baseline core". The limit n might be a limit in size, power, cost, or a combination of those factors. They also assume that an architect can increase the performance of a core by giving it more resources. If a single core of size 1 BCE has performance