Refer to figure 20 (Page 19) of the Single Cycle Datapath module. For the following functional units delays, the clock cycle should be: DELAY (ns) UNITS PC 1 2 INSTRUCTION MEMORY REGISTER FILE 1 ALU 3 DATA MEMORY 2. MUXES 1 ADDERS 1 1 SIGN EXTENDER CONTROL UNITS 1 Refer to figure 20 (Page 19) of the Single Cycle Datapath module. For the following functional units delays, the clock cycle should be: DELAY (ns) UNITS PC 1 2 INSTRUCTION MEMORY REGISTER FILE 1 ALU 3 DATA MEMORY 2. MUXES 1 ADDERS 1 1 SIGN EXTENDER CONTROL UNITS 1