Register file is an important state element of the MIPS processor. Consider the register file shown below. The register file can read and write the data into the registers. The register file has two read ports (A1, A2) and one write port (A3). The width of Al, A2 and A3 is 5 bits Writing data into the register is synchronized with the clock signal. WE is the write enable control signal. WD contains the data for the write operation Implement the register file in VHDL. Write the test bench for this register file. CLK SA1WE3 RD1 A2 WD3 Register Register file is an important state element of the MIPS processor. Consider the register file shown below. The register file can read and write the data into the registers. The register file has two read ports (A1, A2) and one write port (A3). The width of Al, A2 and A3 is 5 bits Writing data into the register is synchronized with the clock signal. WE is the write enable control signal. WD contains the data for the write operation Implement the register file in VHDL. Write the test bench for this register file. CLK SA1WE3 RD1 A2 WD3 Register