run this code below using quartz program to find:

1- vhdl

2- waveform (Rlt)

code is:

library ieee;

use ieee.std_logic_1164.all;

entity hbhb is

port ( clk : in std_logic;

x0,x1,x2,x3 : in std_logic;

d0,d1,d2,d3 : out std_logic);

end hbhb;

architecture Structure of hbhb is

signal r0, s0, r_g0, s_g0, q_a0, q_b0 , s_g1 , r_g1, q_a1, q_b1,s1,r1,s_g2 , r_g2, q_a2, q_b2,s2,r2,s_g3 , r_g3, q_a3, q_b3,s3,r3,s_g4 , r_g4, q_a4, q_b4,s4,r4,r5, s5, r_g5, s_g5, q_a5, q_b5,r6, s6, r_g6, s_g6, q_a6, q_b6,r7, s7, r_g7, s_g7, q_a7, q_b7: std_logic;

attribute keep : boolean;

attribute keep of r0, s0, r_g0, s_g0, q_a0, q_b0 , s_g1 , r_g1, q_a1, q_b1,s1,r1,s_g2 , r_g2, q_a2, q_b2,s2,r2,s_g3 , r_g3, q_a3, q_b3,s3,r3,s_g4 , r_g4, q_a4, q_b4,s4,r4,r5, s5, r_g5, s_g5, q_a5, q_b5,r6, s6, r_g6, s_g6, q_a6, q_b6,r7, s7, r_g7, s_g7, q_a7, q_b7 :

signal is true;

begin

s0 <= x0;

r0 <= NOT x0;

s_g0 <= s0 NAND clk;

r_g0 <= r0 NAND clk;

q_a0 <= s_g0 NAND q_b0;

q_b0 <= r_g0 NAND q_a0;

s1 <= q_a0;

r1 <= NOT q_a0;

s_g1 <= s1 NAND (not clk);

r_g1 <= r1 NAND (not clk);

q_a1 <= s_g1 NAND q_b1;

q_b1 <= r_g1 NAND q_a1;

d0<= q_a1;

s2 <= x1;

r2 <= NOT x1;

s_g2 <= s2 NAND clk;

r_g2 <= r2 NAND clk;

q_a2 <= s_g2 NAND q_b2;

q_b2 <= r_g2 NAND q_a2;

s3 <= q_a2;

r3 <= NOT q_a2;

s_g3 <= s3 NAND (not clk);

r_g3 <= r3 NAND (not clk);

q_a3 <= s_g3 NAND q_b3;

q_b3 <= r_g3 NAND q_a3;

d1<= q_a3;

s4 <= x2;

r4 <= NOT x2;

s_g4 <= s4 NAND clk;

r_g4 <= r4 NAND clk;

q_a4 <= s_g4 NAND q_b4;

q_b4 <= r_g4 NAND q_a4;

s5 <= q_a4;

r5 <= NOT q_a4;

s_g5 <= s5 NAND (not clk);

r_g5 <= r5 NAND (not clk);

q_a5 <= s_g5 NAND q_b5;

q_b5 <= r_g5 NAND q_a5;

d2<= q_a5;

s6 <= x3;

r6 <= NOT x3;

s_g6 <= s6 NAND clk;

r_g6 <= r6 NAND clk;

q_a6 <= s_g6 NAND q_b6;

q_b6 <= r_g6 NAND q_a6;

s7 <= q_a6;

r7 <= NOT q_a6;

s_g7 <= s7 NAND (not clk);

r_g7 <= r7 NAND (not clk);

q_a7 <= s_g7 NAND q_b7;

q_b7 <= r_g7 NAND q_a7;

d3<= q_a7;

end Structure;

showing me the picture and answer as txt. and picture from program