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Say we had the following code sequence: or $rl, $r2, $r3 or $r2, $r1, $r4 or $r1, $r1, $r2 a) Assuming the register file has

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Say we had the following code sequence: or $rl, $r2, $r3 or $r2, $r1, $r4 or $r1, $r1, $r2 a) Assuming the register file has bypass capability (meaning a value can be read in the ID stage when a previous instruction is writing that value in the WB stage), but there is no forwarding support, and no support for stalling. How many nop's would need to be inserted in this code to get it to execute correctly? b) What if there were only partial forwarding support, specifically only from the output of the ALU back to the input of the ALU? Would this code still need any nop's for proper execution? If so, where and why

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