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Section 0.3: Semiconductor Memory Problem 21: Answer the following: (a) How many nibbles are in 16 bits? (b) How many bytes are in 32 bits?

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Section 0.3: Semiconductor Memory Problem 21: Answer the following: (a) How many nibbles are in 16 bits? (b) How many bytes are in 32 bits? a word is defined as 16 bits how many words is a 64-bit data item (d) What is the exact value in decimal) of 1 meg? le) How many kis 1 meg? (0) What is the exact value in decimal) of 1 gigabyte? (B) How many kis 1 gigabyte? (h) How many megs is 1 gigabyte? (0) If a given computer has a total of 8 megabytes of memory How many kilobytes is this? Sven computer has a total of 8 megabytes of memory, how many bytes (in decimal) is this? Problem 22: A given mass storage device such as a hard disk can store 2 Rigabytes of information Assuming that each page of text has 25 rows and each row has 80 columns of ASCII characters (each Character = 1 byte), approximately how many pages of information can this disk store? Problem 23: In a given byte-addressable computer memory locations 10000H to 9FFFFH are available for user programs. The first location is 10000H and the last location is 9FFFFH. Calculate the following (a) The total number of bytes available in decimal) (b) The total number of kilobytes (in decimal) Problem 25: Below are listed several computers with their data bus widths. For each computer, list the maximum value that can be brought into the CPU at a time (in both hex and decimal). (a) Apple 2 with an 8-bit data bus (b) X86 PC with a 16-bit data bus (c) x86 PC with a 32-bit data bus (d) Cray supercomputer with a 64-bit data bus Problem 26: Find the total amount of memory, in the units requested, for each of the following CPUs, given the size of the address buses: (a) 16-bit address bus (in K) (b) 24-bit address bus (in megs) (c) 32-bit address bus (in megabytes and gigabytes) (d) 48-bit address bus (in megabytes, gigabytes, and terabytes) Problem 27: Regarding the data bus and address bus, which is unidirectional and which is bidirectional? Section 0.4: Harvard and von Neumann CPU Architectures Problem 51: Which register of the CPU holds the address of the instruction to be fetched? Problem 52: Which section of the CPU is responsible for performing addition? Problem 53: List the three bus types present in every CPU. Section 0.5: RISC Architecture Problem 54: What do RISC and CISC stand for

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