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Section 6.4-Demultiplexers 6.4.1 Design a 1-to-8 demultiplexer by hand. The block diagram and truth table for the demulti- plexer are given in Fig. 6.9. Give
Section 6.4-Demultiplexers 6.4.1 Design a 1-to-8 demultiplexer by hand. The block diagram and truth table for the demulti- plexer are given in Fig. 6.9. Give the minimized logic expressions for each output and the full logic diagram for the system. 1-to-8 Demultiplexer Fo F2 F3 F6 F7 Selz Selj Sel Sel2 Sel, Selol F, Fo Fs F Fa F2 F1 Fo 0 0 0 0 0 0 0 0 0 0 A 0 0 1 0 0 0 0 0 0 A 0 0 1 0 0 0 0 0 0 A 0 0 0 1 1 0 0 0 0 A 0 0 0 1 0 0 0 0 0 A 0 0 0 0 1 0 1 0 0 A 0 0 0 0 0 1 1 0 0 A 0 0 0 0 0 0 1 1 1 A 0 0 0 0 0 0 0 Fig. 6.9 1-to-8 Demultiplexer Functionality
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