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Short Answer # 2 [ 2 0 marks ] For this question you will be asked to design a memory decoder circuit and present one

Short Answer #2[20 marks]
For this question you will be asked to design a memory decoder circuit and present one memory-block/IC from that design.
a) You are building an application specific digital device (ASDD) that needs to hold 256bytes of data (8-bits wide) in a volatile memory. The only available memory units are 32-bytes (8-bits wide). Design a memory decoder for this custom digital system by deriving the logic expressions. From the memory user's perspective, they should be able to use 256-bytes as a contiguous memory block.
For this part,
i) design only the ASDD memory-block/IC decoder (do not design the memory decoder inside each memory-block/IC),
ii) clearly state how many bits are required for memory-block decoding,
iii) clearly state how many bits are required for addressing each block, and
iv) clearly state how a user would access address (100)10 in memory (show decode-bits:address-bits).
Your decoder must be designed using digital design methodology from lecture and labs (truth table, k-map, and minimized Boolean functions). You may not use predesigned integrated circuits elements for the decoder (e.g., MUX, Encoder, Decoder, etc.).[10 marks]
b) Based upon part-a, very neatly draw one specific memory-block/IC of your memory design's digital circuit. The specific memory-block/IC contains address (100)?10. If you did not complete part-a or cannot determine which memory-block/IC contains the specified address then you may use block-0 with a 4 mark deduction.
For this part,
i) clearly state the memory-block/IC that contains address (100)10(remember ?2 that memory-block ICs are labelled starting at 0),
ii) for the individual memory IC you shall represent it as a functional unit/block with clearly labelled pins that show: address pin(s), enable pin(s), clock, read/write pin(s), data input(s), data output(s)(Do not draw the memory ICs at the flip-flop level), include the digital circuit (gate level) that the decoder from part-a uses to enable this block/IC.
Cleary label all inputs and outputs. You may assume the complement of any variable is readily available. [10 marks]
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