Show how to build each of the following logic functions using one or more 74x138 binary decoders and NAND gates. (Hint: Each realization should be equivalent to a sum of minterms.)

F=A,B,C,D(0,6,10,14)

- create the continuous assignment Verilog implementation for the multiplexor implementation you just designed. You will need to use the two-to-one mux as your starting module in this design.