SKEE 2263 Q.3 (a) Analyze the circuit in Fig. Q.3a(i) and complete the timing waveform for output Y[3..0) in hexadecimal in Fig. Q3afii). (10 marks) Register 3 bit Up Counter inopso Yp301 op.01. 03.01 02.01 Inp.. in 1101 CLR CUR Mode Clear Fig. Q.3a(1) Clock Clear Mode O Y13.01 Fig. Q.3a(it) b) Using one D flip-flop and not more than two 2-to-1 muxes, design a register cell that implements the functions listed in Table Q.3(b). (10 marks) Table Q.3(b) CLR Function 0 Q. LD RTL 0 1 Hold CLEAR LOAD 0 1 Q40 OD