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SUBJECT: Computer Architecture PROBLEM: What is the Multicycle Instruction Datapath for the instruction type addi $15, $20, 5 ? The explanation should address the 4

SUBJECT: Computer Architecture

PROBLEM: What is the Multicycle Instruction Datapath for the instruction type addi $15, $20, 5?

The explanation should address the 4 cycles and subquestions below: (1) Instruction Fetch (a) Instruction is fetched FROM memory. Where is it placed? (b) What control signals cause all this to happen? (c) What else happens during this step? (2) Instruction Decode and Register Fetch (a) What values are read which the registers, and what happens to those values? (b) What else occurs durring this step (i.e. what does the ALU do)? You have the wrong value listed for operand 1, and you have two different values being listed as operand 2 -- which is used? (c) What control signals cause all this to happen? (3) Execution (perform math/logic operation in ALU with register and immediate value operands) (a) Where to the ALU operands come from? (b) What control signals cause all this to happen? (4) Instruction Completion (Write resulting value to register). (a) Where does the result come from? (b) How does the CPU know where to store it? (c) What control signals cause all this to happen?

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