Subject - Computer Organization and Architecture [ Theory ]

///////// It's my 3rd-time post for this questions answer. if you don't have enough knowledge for solving this answer, please skip it.

Hi Experts! Would you please try to solve this as soon as possible with 100 % Accuracy? If possible, please do it.

You have to follow some instructions which I mentioned below. If you don't follow my instructions, please skip my questions.

You have to answer only #3 . I repeated, don't do other numbers.

Instructions are given,

• You need to show detailed calculations, as required.
• You need to provide clear diagrams, as required. All diagrams should be clearly drawn

3. 20 Consider the following assembly code: Instruction Description LOAD R1, M1 Read data from memory address M1 and store in R1. LOAD R2, M2 Read data from memory address M2 and store in R2. OR RS, R1, R2 JUMP Target1 Target2: XOR R2, R1, R1 Logical Ex-OR between contents of R1 with R1 and store result in R2 Target3: ADD R7, R1, R5 Add contents of R1 and R5 and store to R7 OR R2, R4, R6 Logical OR between contents of R4 with R6 and store result in R2 OR RS, R3, R7 ADDR5, R7, R3 AND R1, R2, R3 Target1: SUB R3, R1, R2 Subtract content of R2 from R1 and save result in R3; here R1 = R2 BNEZ R3, Target2 Jump to Target2 if R3 is non-Zero BEZ R3, Target3 Jump to Target3 if R3 is Zero OR R2, R4, R6 Logical OR between contents of R4 with R6 and store result in R2 STORE M4. R2 Save contents of R2 to memory address M4 END Use five-stage pipeline containing Fetch, Decode, Memory read, Execute, Write-back units, show the execution of program (at least 20 time steps). Data dependencies and control hazards, if detected must be resolved by delaying the pipeline as required. Use the following format: Instruc me-step 23 5 LOAD R1, Mi LOAD R2, M2 OR R5, R1, R2 JUMP Target1 Target2: XOR R2, R1, R1 Target3: ADD R7, R1, R5 OR R2, R4, R6 OR RS, R3, R7 ADDR5, R7, R3 AND R1, R2, R3 Target1: SUB R3, R1, R2 BNEZ R3, Target2 BEZ R3, Target3 OR R2, R4, R6 STORE M4, R2 END