Suppose that an 8M x 64 (8M words and each word is 64 bits) main memory is built using 256K x 8 RAM chips and memory is word-addressable.

a) How many RAM chips are necessary?

b) If we were accessing one full word, how many chips would be involved?

c) How many address bits are needed for each RAM chip?

d) How many banks will this memory have?

e) How many address bits are needed for all of memory?

f) If high-order interleaving is used, where would address 0x2FFF0 be located?

g) Repeat f for low-order interleaving. (For f and g, draw diagrams indicating how many and which bits are used for chip select, and which bits are used for the address on the chip)