Suppose the branch frequencies (as a percentage of all instructions) are given

Instruction Type	Frequency
Unconditional branches	2%
Conditional branches	16%
Untaken conditional branches	47%

Assume a high-performance processor in which a 15 deep pipeline where unconditional branches are resolves at the end of the fifth stage and conditional branches are resolved at the end of the 10th stage. Assuming that only the first pipeline stage can be done independent of whether the branch goes and ignoring other pipeline stall, how much faster would the machine be without any branch hazards?