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Suppose we have 2 10 bytes of virtual memory and 2 8 bytes of physical main memory. Suppose the page size is 2 4 bytes.

Suppose we have 210 bytes of virtual memory and 28 bytes of physical main memory. Suppose the page size is 24 bytes.

For the above system, suppose a main memory access requires 30ns, the page fault rate is .01%, it costs 12ms to access a page not in memory (this time includes the time necessary to transfer the page into memory, update the page table, and access the data).

Also suppose a TLB hit requires 7ns, the cache miss rate is 3%, the TLB hit rate is 95%, a cache hit requires 15ns. On a TLB or cache miss, the time required for access includes a TLB and/or cache update, but the access is not restarted. On a page fault, the page is fetched from disk, all updates are performed but the access is restarted. All references are sequential (no overlap, nothing done in parallel)

a.) Calculate the time for a TLB hit and a cache hit.

b.) Calculate the EAT (effective access time) for a TLB hit.

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