Suppose you have a processor with a base CPI of 1.0, and one level of cache. You have the following specifications Clock rate=5 GHz. Main memory access time = 120 ns Miss rate per instruction at the cache is 15%. A program contains 3000 instructions. 900 of them are memory access instructions. Taking into consideration the stalls on Data cache only find the total average CPI. O a. 2.3 ob. 3.7 Oc 3.4 d. None of them O e. 2.8