Suppose you have to implement two new commands in SAP$-1$ called ADI and SHL$.$

i$)$ ADI $($Add Immediate$)$ does the following$-$

AlarrA$+$RAM$[PC],$PClarrPC$+1$

which means it will add the immediate byte following the opcode to A register and then

increment the value of PC to prepare for the next instruction fetch. The instruction takes

no operand.

ii$)SHL$ does the following$-$

AlarrSHLA

which means it will shift the contents of A one bit left. The instruction takes no operand.

a$.$ Write the microinstructions of $T4,T5$ and $T6$ for ADI and $SHL.$

$2+2=4$

b$.$ Generate the Control words for T$4,$ T$5$ and T$6$ for ADI and $SHL$ according to the

following format$-$

$2+2=4$

c$.$ Draw the timing diagram for ADI and $SHL$ command.

$3+3=6$

d$.$ The contents of the Control ROM and Address ROM are given here. Show the

updated contents of these ROMs accommodating the ADI and SHL instruction

$($assuming a $32$x$12$ Control ROM$).$ Show only the relevant part of Control ROM but

all of Address ROM. Assume the opcodes of the ADI and SHL instructions are