T Flip-Flop Component Name(s) [print] The 74-74 is a dual D flip-flop (DFF), with indepen- dent preset, reset, and clock inputs for each flip-flop. Note that the preset (PRE on the pinout, 5 on the schematic) and reset (RST on the pinout, R on the schematic) inputs are active low. These inputs should normally be high, and momentarily brought low when you want to preset or clear the flip-flop. A 74-xx series chip with T flip-flops does not exist. One way to make a T flip-flop starting with a D flip- flop is shown below. 1. Starting from the trainer-simple.dig template, build the following circuit. You may use on the 74-74 chip component and the 74-86 XOR chip component. 2. To complete the characteristic table, you may need to preset (1) or reset (0) the current state of Q, if it is in the incorrect state for the next ta- ble entry. To do this, make the appropriate switch LOW, then switch it back to HIGH. 3. Transitions only occur at the rising edge of the 1CLK signal. Make sure to push the clock push- button only once each time! It is a debounced pushbutton, so no glitches will occur due to the button hardware. 4. Using the preset and reset inputs as necessary to set Q(t) if needed, complete the first blank column 0,1 T Q(t) Q(t+1) 0 0 1 0 1 0 1 1 in the characteristic table. The cells will be 0 or 1, shown by the output LED on the 1Q output pin. 5. Next, go through the table rows pairwise, and identify each Q(t + 1) pair as either 0, 1, Q(t), or Q(t). 6. Rename your final circuit to your lastname-tff.dig and turn it in on Blackboard. U2-3 74LS86 PWR 2RST 1RST 00 1 2 0, 1, Q(t), Q(t) Q(t+1) 1D ~ 74-74 1CLK w2D 1PRE S1) PLO 2CLK 1Q 2PRE SO 1Q2Q Dual DFF 12 D 11 c 5 6 7 2Q S R Score GND Q 8 U1-2 74LS74 L6)