The 4-bit adder/substractor designed can be used to add or substract unsigned numbers or twos complement numbers. Extend the 4-bit adder/substractor with the following flags.by using VHDL

3.1 Negative flag (N), which indicates the result is negative (i.e. most significant bit is 1).

3.2 A zero flag (Z), which indicates that the result is 0 (i.e. all bits of the result are 0).3.3 Carry Flag (C), which indicates the adder/subtractor produced a carry, i.e. overflow in unsigned arithmetic. It is also used for propagating the carry between words in multiple- precision arithmetic.

3.4 Overflow flag (V), which indicates that the result of the addition or subtraction of two twos complement numbers overflowed (i.e. outside the range of numbers that can be represented using a 4-bit twos complement number, i.e. outside the range of -8 to 7 in

this case).

3.5 Write a test bench for the 4-bit adder/substractor extended with output flags

3.6 Present the simulation results of the test bench to show that the added flags work as

expected.