The block diagram of a 6-bit multiplier with optimal size ALU (adder) and registers is given below. Multiplicand 6 bits Shift Right 6-bit ALU bat aur? Multiplier 6 bits Shift Right Control 12 bits Product Write Assume that the Multiplicand and Multiplier registers are loaded with 6-bit numbers for multiplication and the product register is cleared initially as shown below. Two 6-bit unsigned binary numbers are to be multiplied using shift or add/shift operations. During this process, show the contents of all these registers that change. Determine the contents of these registers after an add shift or just shift operation and fill up the following table after each operation. Product Operation Shift and/or Add Multiplicand Multiplier Initial Values 000000000000 011011 010101