The CSA-based multiplier circuit (last version we saw in class) appears to be suboptimal. In particular, two full adders in the first row have Os as inputs whereas they could also have a0 AND b2 and al AND b2 as inputs, respectively. Doing more useful work carlier at no circuit cost should be an improvement. Try redrawing the circuit to maximize the number of full adders with three partial-product bit inputs (replacing a 0, a carry, or a sum from one or more of the full adder). Make sure it still works and that each FA has at most 3 inputs! Show your drawing. Does the timing change? Totale 6 FLOW hbu a3b1 The CSA-based multiplier circuit (last version we saw in class) appears to be suboptimal. In particular, two full adders in the first row have Os as inputs whereas they could also have a0 AND b2 and al AND b2 as inputs, respectively. Doing more useful work carlier at no circuit cost should be an improvement. Try redrawing the circuit to maximize the number of full adders with three partial-product bit inputs (replacing a 0, a carry, or a sum from one or more of the full adder). Make sure it still works and that each FA has at most 3 inputs! Show your drawing. Does the timing change? Totale 6 FLOW hbu a3b1