The following problem deals with a virtual memory system with an 18 bit address space (from 0 to 262,144 (256K) locations). The system is byte addressable and uses an 8192 (8K) bytes per page organization. The virtual memory, therefore, is organized into 32 page frames of 8KiB each for each process. For this system, the physical memory is configured with 32 real pages, with the operating system itself occupying the last 6 pages permanently, and all user programs paging against the first 26 physical pages as they run. Remember, the 18 bit address spaces will allow each user process to have a virtual address space of 256KiB (32 pages) even though only 26 real pages will be available for all running users to share during execution. The current status of this system is shown below for a time when 3 processes, A, B and C, are active in the system. A is presently in the running state while B and C are in the ready state. As you look at the current CPU registers, you can see that the running thread in process A has just fetched a JUMP instruction from its code path. The PROGRAM COUNTER (PC) value shown is the (binary) VIRTUAL address of the JUMP instruction itself, which is now in the INSTRUCTION REGISTER (IR), and the JUMP instruction shows a (binary) VIRTUAL address to jump to as it executes.

A. From what REAL physical byte address did the current JUMP instruction in the IR come from (i.e. what physical address does the IP/PC point to) ? (You can give a combination or the single number actual address, but use base 10 numbers either way)

Give a base 10 answer______________________

B. To what REAL physical byte address will control be transferred when the current JUMP instruction executes ?? (Remember, a page fault can occur if a process thread references an invalid page, and faults are satisfied by connecting a virtual page to an available free physical page.) (Again, you can give a combination or the single number actual address, but use base 10 numbers either way).

Give a base 10 answer______________________

SYSTEM MEMORY FRAME TABLE AND CURRENT PAGE TABLE FOR RUNNING PROCESS A SYSTEM PAGE TABLE FOR PROCESS A FRAME TABLE FRAME PAGE BIT E 2 CPU PC (BASE 2 1 1 0 1 0 0 0 0 0 1 0 1 0 1 0 1 1 0 BY A LOHNED BY B 1 I 1 10000 E 2 JUMP 0 1 0 1 1 0 0 0 1 0 1 1 0 1 1 0 1 1 BY C 00000 BY C BY A NONE I 00100 I LOANED BY A. L ONNED BY A l 7 1 11001 NONE I L OnNED BY A I 9 0 L ONNED BY A I 10 I 1 01001 11 BY B 01100 I L ONED BY A 12 1 13 14 NONE I LOANED BY C 15 NONE I 00110 I 16 LOANED BY B 17 i 0 BY C 18 19 01010 I LOANED BY A I 20 NONE I 21 10110 I BY C LOANED BY A 22 0 NONE I 00111 I LOANED BY B 23 I 1 24 BY C L OTTNED BY A I 25 0 l OP SYS I 26 1 10100 I OP SYS 27 I OP SYS 28 I 0 OP SYS 29 I OP SYS 30 31 I OP SYS