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The L 2 data cache of a CPU is a 4 KB , 8 - Way Set Associative with a line size of 3 2
The L data cache of a CPU is a KBWay Set Associative with a line size of bytes. The CPU can address a byteaddressable MB main memory.
What is the number of memory address lines?
What is the number of sets the cache has?
How many bits are needed for the block wordoffset?
How many bits are needed for the Tag field?
To which cache set number the memory block number belongs to
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