The state transition diagram for an HLSM is given below. The output C (32 bit) comes from a register of the same name (Creg). A and B are 8-bit local storage registers reset (C>(A+B)) So A:=2 6:=4 6: = 0 S3 (A7B) B:= A-2 (A76) (A76) a>(A+B) ((())() (S) A:= B+3 S2 (A7B) (Cy(A+B)) (A76) (47(A+B)) (A7B) (CY(A+B)) (CY(A+B)) C:= C+ B (a) Create a datapath for this HLSM. Show and name all the inputs and outputs of the datapath. For each component in the datapath, clearly identify it to show its function, name its inputs and outputs, and give the number of bits of each. (b) Derive the FSM and draw the state transition diagram. Write the state transition and output tables using binary state encodings (Hint: You can use a shorthand notation Agt for A > B and Cgt for C> A+B). (c) Write the minimized Boolean equations for the next state and output of FSM