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THIS is mips question! Really need your help! thank you so much!!!! really rush in time 1. (20 pts) For a direct-mapped cache design with

image text in transcribedimage text in transcribedTHIS is mips question! Really need your help! thank you so much!!!! really rush in time

1. (20 pts) For a direct-mapped cache design with a 32-bit byte address, the 32 bits are divided into Tag/Index/Offset as follows: IndexOffset Tag 31-8 a. b. 7-3 2-0 What is the cache block size (in bytes)? How many entries does the cache have? For each address in the given byte address sequence, fill the table below to specify the Index, Tag, whether the reference is a hit or a miss, and whether a replacement will be triggered. Assume the cache is initially empty. Use hex- decimal numbers for Index and Tag. HitReplacement? Address Index Tag Hit/Miss 0x20038

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