This project is to compare different 32-bit multipliers and investigate the timing of the multipliers. Assume 10 ns delays for the gates. Design the following 32-bit multipliers, a). Array multiplier b) Signed 2's complement multiplier c) Booth multiplier write the VHDL codes for all multipliers, and run simulations with ModelSim. Use different test numbers and compare all multipliers. Give conclusions: a). which multiplier is the best one? b). and why