USE VHDL NOT VERILOG. I KNOW THIS ANSWER ALREADY EXISTS. PLEASE DONT COPY ANSWER WHICH IS IN VERILOG. USE VHDL!!!!

For the SM Chart given for Problem 5.16, implement a two-address microcontroller instead of a ROM,

and give suitable answers for parts (a)-(d). Note that the two-address controller determines

NST and NSF and uses a register rather than a loadable counter.

5.16 Realize the following SM chart using a ROM with a minimum number of inputs, a multiplexer, and a loadable counter (like the 74163). The ROM should generate NST. The multiplexer inputs are selected as shown in the table beside the SM chart. (a) Draw the block diagram. (b) Convert the SM chart to the proper format. Add a minimum number of extra states (c) Make a suitable state assignment and give the first five rows of the ROM table. d) Write a VHDL description of the system using a ROM 0 X1 X2 0 Zl Si/ 10 X2 x3 0 X2 5.16 Realize the following SM chart using a ROM with a minimum number of inputs, a multiplexer, and a loadable counter (like the 74163). The ROM should generate NST. The multiplexer inputs are selected as shown in the table beside the SM chart. (a) Draw the block diagram. (b) Convert the SM chart to the proper format. Add a minimum number of extra states (c) Make a suitable state assignment and give the first five rows of the ROM table. d) Write a VHDL description of the system using a ROM 0 X1 X2 0 Zl Si/ 10 X2 x3 0 X2