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Question #3: [10] Consider the main memory has storage capacity of 128 bytes (data given in Table-2) and Cache memory have data storage capacity of 16 bytes (initially empty). As a computer architect designer, you are required to select an optimal Block Size which will give maximum Hit Rate when Cache is mapped as Fully Associative for the given code. Justify your answer by drawing the table and fill-in the data, for each of the block size you chose for comparison. Give at least two such tables. Note: Consider the separate cache for data and instruction. Only calculate the hit rate of data cache. Table 2- Main memory block Code Example: Address Data 000000 A[0] char A[10], B[10], sum[10]; chari; 0001001 0001010 A[9] B[O] for(i=0; i